AM Modulator / Demodulator Design

1. Read on the datasheet

Three lines of the electrical characteristics table fill the fields above. Makers print limits (a minimum, a maximum or a range), never the value of the part in hand.

Enter V_P and one of the other two. For V_P take the middle of the V_GS(off) range, as the presets do. r_DS(on) is printed as a maximum and I_DSS as a minimum, so both describe the weakest part the maker will ship, not a typical one.

2. Worked out on this page

The design needs one straight line: the channel conductance G against the gate voltage. Its zero is V_P and its slope is beta. No datasheet prints beta; it follows from V_P and either of the other two figures, which is also why either one gives the other:

The same model says the channel conductance at V_GS = 0 equals the transconductance there, the figure amplifier datasheets print, hence the last row of the table:

Everything after that is computed too: the bias V_C = V_P/2, the channel resistance there, and the JFET model of the LTspice export, whose Beta is half this page's beta because SPICE writes the square law as Beta (V_GS - V_P)²:

3. Measure it in the lab

Two JFETs with the same part number can differ by a factor of three or more, so the part that goes on the board is worth measuring. The safest way is also the one the Measured points mode reads: the channel as a resistor with a small voltage across it, exactly how the modulator uses it.

1. Ground the source. Feed the drain from a small V_in, 0.1 V to 0.2 V, through R_series of about twice the expected r_DS(on), the channel's value at the bias point. V_D can never exceed V_in, which keeps the channel ohmic everywhere but in the last few tenths of a volt before V_P.
2. Drive the gate from an adjustable negative voltage, for instance a potentiometer across a negative supply. The gate draws almost no current.
3. Start at V_GS = 0 and step towards V_P in about ten steps. At each step read V_GS at the gate, V_in at the top of R_series and V_D at the drain.
4. Stop when V_D is almost V_in: the channel is nearly closed.
5. Choose Measured points above and enter one row per step: V_GS V_in V_D R_series, with R_series as measured on an ohmmeter. The page turns each row into a conductance and fits the line.
6. Set the fit window on the straight stretch, leaving out the last points near V_P, where a real channel closes gradually rather than at once.

The fitted V_P lands a little closer to 0 V than a V_GS(off) reading, which is taken at a tiny current, out in that gradual tail. The design runs on the line, so the fitted value is the one to keep.

4. Another way: a fixed V_DS and an ammeter

The same line can be measured the other way round: hold the drain at a fixed small voltage and read the drain current while the gate voltage steps. The mode Measured I_DS at a fixed V_DS reads these rows. Holding the gate and sweeping the drain instead gives the output curves, read in the optional section of the same mode.

1. Ground the source. Hold the drain at a small fixed voltage, 0.2 V for instance, with an ammeter in series to read I_DS.
2. Step the gate from 0 V towards V_P, for instance by 0.5 V, and note I_DS at each step, until the current is almost zero.
3. Choose Measured I_DS at a fixed V_DS above, enter V_DS and one row per step: V_GS I_DS, with I_DS in milliamps.

Both methods measure the same thing, the channel conductance at a small drain voltage. Dividing the current by V_DS gives it, so the straight line of I_DS against V_GS is the conductance line scaled by V_DS: its slope is beta V_DS and it reaches zero at V_P.

The difference is in what the voltage reading includes. A V_DS set on a supply also drops across everything in series with the channel: the ammeter's shunt, the output resistance of the source (50 Ω on a function generator), the wires. Near V_GS = 0 the channel itself is only a few tens of ohms, so that resistance R_s takes a large share and flattens the top of the curve. Reading V_DS with a voltmeter at the drain removes it; otherwise the field R_s subtracts it:

The output curves answer the other question of the design: how large V_DS may get before the channel stops acting as a resistor. On the I_DS against V_DS curves the straight start is the ohmic region and, once the drain passes |V_P|, the flat top at V_GS = 0 is I_DSS. Sweeping V_DS to the plateau puts V_DS x I_DS into the part, about 0.36 W for 60 mA at 6 V, already past what a TO-92 J111 dissipates at room temperature: keep that sweep short.

Quick readings without the fit

1. V_P, any JFET: gate to ground, 1 MΩ from source to ground, drain at +15 V. The source rises until the channel is almost closed, so a 10 MΩ voltmeter on the source reads about |V_P| (V_GS(off) at a few microamps, like a datasheet).
2. I_DSS, low-current parts only: gate tied to source, V_DS about 10 V (more than |V_P|), read the drain current briefly. 10 V x 5 mA = 50 mW is fine for a 2N5457; a J111 passes 20 mA or more, so measure it the ohmic way instead.

Both go into the V_P and I_DSS mode.

Everything the gain cell needs from the JFET is one straight line, the conductance against the gate voltage. Its slope is called beta and its zero is the pinch-off voltage V_P. Any two facts about the part fix that line.

From measurements: each row gives the channel resistance at one gate voltage, either read directly or from a divider (V_in through R_series into the drain, V_D at the drain, source grounded, so r_DS = R_series V_D / (V_in - V_D)). Turned into conductances, the 6 points inside the chosen window (-7.20 V to 0.00 V) are fitted with a least-squares line:

How straight the part really is over that window: R^2 = 0.9931, and the largest gap between a point and the line is 1.8% at V_GS = -1.00 V. A few percent is normal; the design stays inside this window, so it never relies on the line where it was not checked.

The bias point is the middle of the window and the swing is a fraction of its half-width, instead of the V_P/2 and |V_P|/2 the datasheet modes assume. The I_DSS and r_DS(on) the fitted line implies, 293.89 mA and 12.5 Ω, are shown only for comparison with a datasheet.

An AM modulator needs a gain that follows the message. The trick used here: a JFET operated with a small drain-source voltage behaves like a resistor whose value is set by its gate voltage, so it can be dropped in wherever a resistor sets an amplifier's gain.

Why a resistor: in the ohmic (triode) region, where V_DS is small, the JFET channel is a conducting path whose width the gate controls. A more negative gate narrows it, until at V_GS = V_P (the pinch-off voltage, negative for an N-channel part) it closes completely. The standard model for the drain current there is:

I_DSS is the current at V_GS = 0 with the channel fully open. For a small V_DS the squared term is negligible next to the first one, and what is left is Ohm's law, I = G V, with a conductance that depends on the gate only:

That conductance is a straight line in V_GS with slope beta: zero at V_GS = V_P (channel closed, infinite resistance) and beta |V_P| = 2 I_DSS/|V_P| = 1/r_DS(on) at V_GS = 0 (channel wide open). Here the line was fitted to measured points (see the characterization panel), which gives beta = 10.9223 mS/V and V_P = -7.336 V directly, and the bias sits at the middle of the measured window, V_C = -3.60 V, so the design never leaves the stretch of the curve that was checked:

Two separate conditions govern how large V_DS may be, and in this circuit V_DS is the carrier itself: the op-amp's feedback holds its inverting input, where the drain sits, at the carrier voltage. First, the triode formula only holds while V_DS stays below V_GS - V_P; past that point the channel pinches off at the drain end and the current stops growing (saturation). The tightest moment is the most negative gate swing, V_GS = -6.81 V, where V_GS - V_P = 0.522 V. A carrier larger than that saturates the JFET on every carrier peak while the message is in its trough, and the envelope is clipped there.

Second, within the triode region the squared term is not a problem for the envelope at all, and it is worth seeing why rather than just keeping V_DS small. Put the carrier in and write out the op-amp output (the current through R_b is the drain current, so V_out = V_DS + R_b I_D):

The first term is the wanted AM signal, gain set by the gate. The second term does not contain V_GS: it is a fixed DC offset plus a tone at twice the carrier frequency, both of amplitude R_b beta A_c^2/4, whatever the message is doing. It cannot distort the envelope; it only adds a spectral line at 2 f_p, which any band-limiting after the modulator removes. With the carrier amplitude designed below (A_c = 76.0 mV) that line is 2.5 mV, -47.1 dBc below the output carrier, at 100 kHz.

The gain cell is a non-inverting amplifier with the JFET channel in place of the bottom resistor: the carrier x_p(t) drives the + input, the channel goes from the - input to ground, and R_b feeds the output back to the - input. With negative feedback an ideal op-amp keeps its two inputs at the same voltage and draws no input current, so the - input sits at x_p(t), and the current through the channel must also flow through R_b:

So the gain is 1 + R_b G, and G is set by the gate. Now put the message on the gate on top of the bias, V_GS(t) = V_C + x_m(t). Because G is a straight line in V_GS, adding x_m to the gate adds a proportional amount to G. The swing here is a fraction 0.90 of the measured window's half-width, ±3.21 V; as a fraction of the room between V_C and V_P (3.74 V) that is s = 0.860, and s is what sets how far G moves:

Substitute that into the gain and call x = R_b G(V_C) = R_b / r_DS(V_C), the feedback resistor measured in units of the channel resistance at bias:

That is exactly the AM form A_p[1 + n m(t)] cos(ω_p t) from the basics, with the carrier amplitude multiplied by a constant gain and the message riding on it:

Two things to read off. n can never reach s, because x/(1+x) is always below 1: the swing fraction is the ceiling of the modulation index. And a bigger R_b raises both the gain and the depth of modulation, which is what a scope shows when R_b is changed on the same JFET. To hit a target n, invert the relation:

R_b has to be a part that exists, so the rounded value is the one that sets x, and n comes out a little off the target:

Over one message cycle the gate swings by ±3.21 V around V_C and the gain moves between 1.912 and 13.146: the carrier comes out 6.88 times larger at the crest of the message than in its trough, which is the ratio (1+n)/(1-n) of the envelope.

The carrier goes into the op-amp's + input, and the op-amp's feedback copies it onto the - input, which is the JFET's drain. So the carrier amplitude A_c is the drain-source voltage, and two limits decide how large it may be.

(a) Triode region. The channel saturates once V_DS exceeds V_GS - V_P, and the message drives V_GS as low as -6.81 V, so the carrier must stay under 0.522 V. A margin factor k keeps it comfortably inside, where the conductance is still the straight line the whole design rests on:

(b) Op-amp output. At the crest of the message the gain is K_max = 1 + x(1+s) = 13.15, and K_max A_c has to fit inside the output swing:

The smaller of the two wins: A_c = 78.2 mV, set by the triode region. The source delivers 988 mV, so a resistive divider brings it down. Its top resistor is rounded up, to the next value on hand, so that A_c lands at or just under the limit and never above it. It feeds the op-amp's + input, which draws no current, so the divider needs no buffer and its ratio is exact:

What comes out, from the gain at the bias point and at the two extremes of the message:

Current: at the crest the channel is at its lowest resistance, r_DS = 13.2 Ω, and carries A_c / r_DS = 5.77 mA peak. That current comes out of the op-amp through R_b, so it is the op-amp's output current too; well under the 10 mA or so a small op-amp delivers cleanly.

Nothing so far has asked whether the op-amp can follow. The gain cell is a non-inverting amplifier, and a real op-amp's gain-bandwidth product GBW means a non-inverting stage of gain K only reaches GBW/K before it rolls off. Here the gain is not fixed: it moves with the message, so the bandwidth moves with it too.

At the carrier frequency f_p = 50.0 kHz, with GBW = 4.00 MHz, the gain and the loss at the three points that matter:

The loss is largest exactly where the gain is largest, at the crest. That flattens the top of the envelope more than its bottom, which is a distortion of the message itself, not just a smaller signal. Reading the modulation index off the compressed envelope gives the value a scope would show:

Applying that gain-dependent loss to a full sine-wave message and taking the harmonics of the resulting envelope gives the distortion a perfect demodulator would recover: THD = 0.49%. The rule of thumb used here is to keep f_p K_max / GBW at or below 0.2, where the crest loses about 2% and the THD stays well under 1%.

Within the rule of thumb: this op-amp keeps up with this carrier at this gain.

Slew rate is the other limit: the output is a sine of amplitude up to K_max A_c = 1.00 V at 50.0 kHz, whose steepest slope is 2 pi f_p times that amplitude. Keeping it under half the op-amp's slew rate leaves the waveform undistorted:

The gate needs V_C + x_m(t): a DC level of -3.60 V with the message swinging ±3.21 V on top of it. A signal generator delivers something else, typically ±1.00 V centered on 0 V. One inverting summer does the whole job: the source comes in through a capacitor and a resistor R_ac, the supply comes in through a resistor R_bias, and R_f feeds back. Because the op-amp's - input is a virtual ground, each input's current is set by its own resistor alone, nothing loads anything, and the three numbers that matter (gain, bias, high-pass corner) are exactly what the formulas below say.

Currents into the virtual ground add up and flow out through R_f:

The message term needs the gain V_swing / V_source, so R_ac follows from R_f; the DC term has to equal -|V_C|, so R_bias follows from R_f and V_cc. The minus signs are useful: they turn the positive supply into the negative bias an N-channel gate needs, and merely invert the message, a 180 degree phase shift that changes nothing in the AM envelope.

The capacitor in series with R_ac blocks any DC the source might carry, so the bias is set by R_bias alone. Seen from the source, C and R_ac form a high-pass whose corner is 1/(2 pi R_ac C), and since R_ac ends on a virtual ground nothing sits in parallel with it to move that corner. Putting it a decade below the lowest message frequency (100 Hz) costs the message almost nothing: at f = 10 f_c the loss is 10 log(1 + 0.01) = 0.04 dB.

Two practical checks. The source has to drive R_ac = 5.60 kΩ (a generator or a sound card does that without trouble). And the op-amp has to reach the most negative gate voltage, V_bias minus the full swing: -6.81 V here, against an output swing of ±13.5 V on this supply. That fits. With a J111, whose V_P can reach -10 V, this check is the one that bites first.

Why one stage instead of three: an earlier version amplified, then high-passed, then summed with a bias divider. Each stage loaded the one before it, so the divider actually delivered about half the intended bias and the high-pass corner moved up by a factor of ten. With everything meeting at one virtual ground there is nothing to load.

A message such as audio lives at low frequencies. Sent as it is, it cannot be radiated (the antenna would need to be kilometres long) and two senders could never share the air. Modulation moves the message up to a carrier frequency of the sender's choosing. Amplitude modulation is the simplest way to do it: let the message set the size, the amplitude, of a fast carrier wave.

Write the carrier as A_p cos(ω_p t) and the message as m(t), scaled so that it stays between -1 and +1. Amplitude modulation multiplies the carrier by a factor that follows the message:

The bracket is the envelope, the slowly varying outline of the fast oscillation, and n is the modulation index: how far the message is allowed to push the amplitude away from A_p. Nothing in the bracket is invented; it reads "amplitude A_p, plus a bit proportional to the message".

What frequencies does that contain? Take the simplest message, a single tone m(t) = cos(ω_m t), and multiply out. The product of two cosines is where new frequencies appear:

So an AM signal is three sinusoids: the carrier itself, untouched, plus two copies of the message shifted to either side of it, the lower and upper sidebands, each of amplitude nA_p/2. The message never appears at its own frequency ω_m; only the sidebands carry it, and the whole signal fits in a band 2 f_m wide around the carrier.

On a scope the envelope is read directly: its highest value is A_p(1+n), where m = +1, and its lowest is A_p(1-n), where m = -1. Subtracting and adding the two removes A_p:

n cannot usefully exceed 1: past that the bracket goes negative during part of the cycle, the carrier flips phase there and the envelope folds back on itself. An envelope detector only sees the size of the signal, never its sign, so it recovers a distorted message. Below about 0.7 the sidebands become small next to the carrier and most of the transmitted power is wasted, as the next lines show.

The average power of a sinusoid of amplitude A (into 1 ohm) is A²/2. Applied to the three lines above: the carrier carries A_p²/2, each sideband (nA_p/2)²/2, and only the two sidebands carry the message. The fraction of the total power that is actually message is therefore:

Even at n = 1 only a third of the power is message. The carrier is kept anyway because it is what lets a receiver recover the envelope with nothing more than a rectifier and a low-pass filter (see the Demodulator mode).