Tool 07 · Transistor Guide · Field-effect

DGS

Depletion-mode MOSFET

A MOSFET built with its channel already in place: it conducts with the gate at 0 V, and only a negative gate-source voltage turns it off.

Controlled by
Voltage from gate to source, negative to turn it off
With no drive
On: it conducts until the control turns it off
Fully on
A resistance RDS(on)R_{DS(on)}, already at VGS=0V_{GS} = 0: 25 Ω max for a DN2540
Terminals
G gate, D drain, S source
Used for
Current sources and current limiters, up to hundreds of volts; Start-up supplies fed straight from a high-voltage line; Normally-closed solid-state switches
01

How it works

An N-channel depletion MOSFET is built like the ordinary (enhancement) N-MOSFET: an N-type source and drain, a gate on a thin insulating oxide, and a body tied to the source inside the package, which leaves a body diode from source to drain. The difference is that a conducting N channel already exists under the gate when the part is made. With the gate at the source voltage the part is on, and current flows from drain to source through the channel as through a resistor. The symbol shows this with a solid channel line, where an enhancement MOSFET's line is broken in three.

A negative gate-source voltage pushes electrons out of the channel and narrows it: the channel is depleted, which gives the part its name. Near VGS(off)V_{GS(off)}, a few volts below zero, the channel is almost gone: a small current still flows there, and a little further down the part is off. A positive gate does the opposite and draws more electrons in, so the part conducts better than at 0 V. That is the difference from a JFET, which behaves the same below 0 V: the JFET's gate is a PN junction that conducts once forward-biased, while this gate is insulated and may go positive up to its rating, ±20 V on a DN2540.

In its current-source region the part follows the square law of every MOSFET, with a negative threshold VthV_{th}:

ID=k2 (VGS−Vth)2=IDSS(1−VGSVth)2IDSS=k2 Vth2I_D = \tfrac{k}{2}\,(V_{GS} - V_{th})^2 = I_{DSS}\Big(1 - \frac{V_{GS}}{V_{th}}\Big)^2 \qquad I_{DSS} = \tfrac{k}{2}\, V_{th}^2

kk, in A/V², grows with the width of the channel and shrinks with its length. IDSSI_{DSS} is the current at VGS=0V_{GS} = 0, the number a datasheet gives, and VthV_{th} is close to the datasheet's VGS(off)V_{GS(off)}. The second form is the JFET's own law: everything the JFET page says about biasing carries over. It holds for VDS≥VGS−VthV_{DS} \ge V_{GS} - V_{th}, which at VGS=0V_{GS} = 0 means a drain-source voltage above ∣Vth∣|V_{th}|.

Below that edge the channel acts as a resistor whose value the gate sets. At small VDSV_{DS}:

RDS=1k (VGS−Vth)RDS∣VGS=0=∣Vth∣2 IDSSR_{DS} = \frac{1}{k\,(V_{GS} - V_{th})} \qquad R_{DS}\big|_{V_{GS} = 0} = \frac{|V_{th}|}{2\, I_{DSS}}

A datasheet gives that resistance at VGS=0V_{GS} = 0 as RDS(on)R_{DS(on)}: 17 Ω typical and 25 Ω max for a DN2540, at 120 mA. A positive gate lowers it further: the BSS139I goes from 30 Ω max at VGS=0V_{GS} = 0 (15 mA) to 14 Ω max at VGS=10V_{GS} = 10 V (0.1 A).

Regions of operation

RegionGate-sourceDrain-sourceWhat happensUsed as
Off (cutoff)below VGS(off)V_{GS(off)}anyonly leakage flows; the body diode still conducts from source to drainopen switch
Current source (saturation)above VGS(off)V_{GS(off)}VDS≥VGS−VthV_{DS} \ge V_{GS} - V_{th}IDI_D set by VGSV_{GS}, nearly independent of VDSV_{DS}current source, current limiter, start-up supply
Fully on, a resistor (triode, ohmic)above VGS(off)V_{GS(off)}, 0 V includedVDS<VGS−VthV_{DS} < V_{GS} - V_{th}the channel is a resistor, RDS(on)R_{DS(on)} at VGS=0V_{GS} = 0closed switch

Three words clash. A FET's "saturation" is its current-source region, the equivalent of the BJT's active region, not the fully-on BJT switch. Power-MOSFET app notes call that same region "linear mode", while Falstad's hover label "linear" means triode. And the turn-off voltage goes by two names: VGS(OFF)V_{GS(OFF)} on the DN2540, a negative VGS(th)V_{GS(th)} on the BSS139I. Both are test points where a small current still flows, 10 µA and 56 µA, not the voltage at which the part blocks.

Small-signal model and temperature

Around an operating point in its current-source region, the drain current follows small changes of the gate through the transconductance gmg_m, the change in IDI_D per volt of VGSV_{GS}, as in any FET:

gm=2 IDSS∣Vth∣(1−VGSVth)=k (VGS−Vth)=2 k IDg_m = \frac{2\, I_{DSS}}{|V_{th}|}\Big(1 - \frac{V_{GS}}{V_{th}}\Big) = k\,(V_{GS} - V_{th}) = \sqrt{2\, k\, I_D}

A datasheet gives it as GFSG_{FS} or gfsg_{fs} at one current: 325 mS typical at 100 mA for the DN2540, 0.13 S typical at 80 mA for the BSS139I. Temperature moves two other numbers. VGS(off)V_{GS(off)} shifts by up to -4.5 mV/°C on a DN2540, so a hot part needs a more negative gate to turn off. RDS(on)R_{DS(on)} rises by up to 1.1 %/°C, so a hot switch drops more. The square law itself is only rough for a vertical power part like the DN2540, worst near cutoff where current sources run: a design built on it plans to trim a resistor.

Relatives

Low-current parts. Some depletion MOSFETs are built only to limit current. The LND150 (Microchip, TO-92, 500 V) has an IDSSI_{DSS} of 1 to 3 mA at VDS=25V_{DS} = 25 V and about 1 kΩ of on-resistance. With its gate tied to its source it is already a current limiter, and a safe one on a ±15 V breadboard: about 3 mA at most, 90 mW across 30 V against its 0.74 W rating. Infineon's BSS126 (SOT-23, 600 V) passes at least 7 mA, with no maximum given, so a defined current still takes a source resistor.

Few parts, one channel type. Depletion MOSFETs are a niche. The DN2540 has a single maker, Microchip (ex-Supertex), which also makes the LND150; Infineon makes the BSS139I and BSS126. All are N-channel and built for high voltage at modest current. A P-channel depletion MOSFET exists in principle, solid channel line with the arrow pointing out, but is rarely seen as a discrete part.

The JFET is the other normally-on FET: the same law below 0 V, a gate junction that must stay reverse-biased, and a lower voltage rating, 35 V for a J111 against 400 V for the DN2540.

02

The curves

interactive

The output curves of a model depletion MOSFET (Vth=−2V_{th} = -2 V, IDSS=10I_{DSS} = 10 mA). The curve marked 0 V already carries about 10 mA: the part is on with no gate drive. The curve below it is for a negative gate, the ones above for positive gates: unlike a JFET, the gate works both ways. The red line is the load line of 470 Ω on 12 V; with the slider at 0 V the part sits at 10.7 mA with 7.0 V across it. The simulation below uses the same threshold with twice the kk, so IDSS=20I_{DSS} = 20 mA: at 0 V on the gate it reads 20 mA with 2.6 V across the part.

saturation: V_DS = 4.34 V, I_D = 16.30 mA

Right of the dashed edge the curves are flat: the current depends on VGSV_{GS} and hardly on VDSV_{DS}. This is where a FET amplifies, and its name clashes with the BJT: FET saturation behaves like the BJT active region.

03

Circuits to try

Falstad's simulator, one at a time

Each circuit runs in Paul Falstad's CircuitJS, loaded only on request. The sliders are in the panel on the right of the simulator, switches toggle with a click, and hovering a part shows its voltages, currents and state at the bottom right.

Simulation

Depletion MOSFET: on with no gate voltage

An N-channel depletion MOSFET (Vth=−2V_{th} = -2 V) with its source grounded and a 470 Ω load on 12 V. The gate voltage is a slider from -3 to +2 V.

  1. Start at 0 V on the gate: current already flows.
  2. Go negative until it stops, then positive past 0 V.

What to see. A depletion part conducts at VGS=0V_{GS} = 0, like a JFET, and needs a negative gate voltage to turn off, here about -2 V. Unlike a JFET its gate is insulated, so it can also go positive and conduct more. Used with a resistor from source to gate, it makes a current source that runs straight off a high-voltage line, as in the start-up circuit of a switching supply.

Open in the full simulator CircuitJS by Paul Falstad, loaded from falstad.com
04

Design rules

A current source: one resistor from source to gate

The gate goes to the bottom of a resistor RSR_S, the source to its top. The drain current lifts the source above the gate, so VGS=−IDRSV_{GS} = -I_D R_S: more current makes the gate more negative, which cuts the current back. The part settles where that line meets its own law, exactly like a self-biased JFET. Solved for the resistor:

RS=∣VGS(off)∣ (1−ID/IDSS)IDR_S = \frac{|V_{GS(off)}|\,\big(1 - \sqrt{I_D / I_{DSS}}\big)}{I_D}

A DN2540 for 1 mA: VGS(off)V_{GS(off)} runs from -1.5 to -3.5 V and IDSSI_{DSS} is at least 150 mA, so RSR_S comes out between 1.38 kΩ and 3.21 kΩ. Raising IDSSI_{DSS} to 500 mA moves it by only 4 %: the unknown IDSSI_{DSS} hardly matters, the spread of VGS(off)V_{GS(off)} does. A fixed 2.2 kΩ gives anywhere from 0.64 to 1.5 mA depending on the part, so a precise source has its resistor trimmed on the bench.

In series with a load, the same two parts make a current limiter: below the set current they drop at most about ∣VGS(off)∣|V_{GS(off)}|, up to 3.5 V on a DN2540, mostly across RSR_S. In the square law, IDRSI_D R_S plus the VGS−VthV_{GS} - V_{th} the channel needs adds up to exactly ∣Vth∣|V_{th}|, and that is also the least voltage the current source needs across it to regulate, its compliance voltage. On a short circuit the current stops at the set value. The DN2540 holds off 400 V doing it, where a J111 JFET stops at 35 V.

Dissipation is the real limit: P=VDS IDP = V_{DS}\, I_D

P=VDS IDTJ=TA+P RθJAP = V_{DS}\, I_D \qquad T_J = T_A + P\, R_{\theta JA}

A current source drops most of the supply across itself. 1 mA from a 300 V line is 0.3 W; with RθJA=132R_{\theta JA} = 132 °C/W for the DN2540 in TO-92, that is 40 °C above the room. The datasheet's 1.0 W assumes the case held at 25 °C. In free air at 25 °C the TO-92 takes about 0.95 W before the junction reaches its 150 °C limit.

The breadboard trap is the gate tied to the source with nothing in series. A DN2540 then passes at least 150 mA, past its 120 mA continuous rating, and across a 15 V supply that is at least 2.25 W, more than twice what the package can shed.

A start-up supply straight from a high-voltage line

The controller of an off-line switching supply needs power before the converter runs. A depletion MOSFET current source between the rectified line and the controller's supply capacitor charges it at a fixed current whatever the line voltage:

t=C ΔVIDt = \frac{C\, \Delta V}{I_D}

1 mA charges a 10 µF capacitor to 12 V in 120 ms, and costs 0.3 W from a 300 V line. A resistor in its place would be sized for the lowest line voltage and would pass, and waste, more at the highest. Once the converter supplies its own controller, the start-up current is only heat: a design that minds the 0.3 W pulls the gate to -5 V or beyond, well past VGS(off)V_{GS(off)}, to switch it off. The DN2540 lists power supply circuits among its applications.

A rectified mains line is lethal and has no place on a breadboard. The builds below stay on the ±15 V lab supply.

Off takes a negative gate, with margin

A normally-closed switch is on with no drive and off when its gate goes below VGS(off)V_{GS(off)}: below it for every part of the type, and when hot. ΔVGS(off)\Delta V_{GS(off)} is the datasheet's temperature coefficient:

VGS(off)(T)=VGS(off)(25 ∘C)+ΔVGS(off)⋅(T−25 ∘C)V_{GS(off)}(T) = V_{GS(off)}(25\,^{\circ}\mathrm{C}) + \Delta V_{GS(off)} \cdot (T - 25\,^{\circ}\mathrm{C})

A DN2540 at the bad end, -3.5 V with -4.5 mV/°C, needs -3.95 V at 125 °C. The datasheet rates the blocking voltage at VGS=−5V_{GS} = -5 V and the off leakage at -10 V, so a design drives the gate to -5 V or beyond, inside the ±20 V gate limit. A resistor from gate to source keeps the switch closed when the drive is gone: on is the default, the opposite of an enhancement MOSFET.

Off, it still conducts backwards through its body diode, from source to drain. Two parts in series with their sources joined, and one gate drive for both, block either polarity, as a switch on an AC signal needs. Normally-on switches and solid-state relays head the DN2540's list of applications.

05

Real parts and their datasheets

Pinouts as seen from the front, legs down. Every value comes with the condition it is measured at: a number from a datasheet means nothing without it.

SGDflat face

flat face toward the viewer, from the numbered pin table of Microchip's newer DS20006717A; the page-1 photo labels are ambiguous

DN2540N3

N-MOSFET, depletion mode

Microchip (Supertex), TO-92. Datasheet (PDF), ww1.microchip.com

LineValueMeasured at
BVDSXBV_{DSX}400 V minVGS=−5.0V_{GS} = -5.0 V, ID=100I_D = 100 µA
VGS(OFF)V_{GS(OFF)}-1.5 to -3.5 VVDS=25V_{DS} = 25 V, ID=10I_D = 10 µA
IDSSI_{DSS}150 mA minVGS=0V_{GS} = 0, VDS=25V_{DS} = 25 V
RDS(ON)R_{DS(ON)}25 Ω max (17 typ)VGS=0V_{GS} = 0, ID=120I_D = 120 mA
IDI_D120 mA, 500 mATO-92: continuous, pulsed
PDP_D1.0 WTC=25T_C = 25 °C, the case, not the air
θja\theta_{ja}132 °C/W typTO-92
GFSG_{FS}325 mS typVDS=10V_{DS} = 10 V, ID=100I_D = 100 mA
CISSC_{ISS}300 pF max (200 typ)VGS=−10V_{GS} = -10 V, VDS=25V_{DS} = 25 V, f=1f = 1 MHz
VGSV_{GS}±20 V maxabsolute maximum

What to read first. IDSSI_{DSS} first: at least 150 mA with the gate on the source, so the part conducts with no drive, and 15 V across it would mean over 2 W where 132 °C/W allows about 0.95 W in free air. The 1.0 W rating holds only for a case at 25 °C.

DGS

pins 1, 2, 3; surface mount only, on an adapter for a breadboard

BSS139I

N-MOSFET, depletion mode

Infineon, SOT-23. Datasheet, infineon.com

LineValueMeasured at
V(BR)DSSV_{(BR)DSS}250 V minVGS=−3V_{GS} = -3 V, ID=250I_D = 250 µA
VGS(th)V_{GS(th)}-2.1 to -1.0 V (-1.4 typ)VDS=3V_{DS} = 3 V, ID=56I_D = 56 µA
IDSSI_{DSS}30 mA minVGS=0V_{GS} = 0, VDS=10V_{DS} = 10 V
RDS(on)R_{DS(on)}30 Ω max (12.5 typ)VGS=0V_{GS} = 0, ID=15I_D = 15 mA
RDS(on)R_{DS(on)}14 Ω max (7.8 typ)VGS=10V_{GS} = 10 V, ID=0.1I_D = 0.1 A
IDI_D0.10 A maxTA=25T_A = 25 °C (0.08 A at 70 °C, 0.4 A pulsed)
gfsg_{fs}0.060 S min (0.13 typ)∣VDS∣>2∣ID∣RDS(on)max\lvert V_{DS} \rvert > 2 \lvert I_D \rvert R_{DS(on)max}, ID=0.08I_D = 0.08 A
CissC_{iss}60 pF typVGS=−3V_{GS} = -3 V, VDS=25V_{DS} = 25 V, f=1f = 1 MHz
PtotP_{tot}, RthJAR_{thJA}0.36 W, 350 K/WTA=25T_A = 25 °C, minimal footprint
VGSV_{GS}±20 V maxabsolute maximum

What to read first. The threshold is negative: the part conducts at VGS=0V_{GS} = 0 and needs -2.1 V or lower to turn every one off. It is also ESD class 0, under 250 V human-body model.

06

On the bench

Meter check. Shorting the gate to the source for a moment empties the gate. The gate then reads open to both other pins, both ways: it is insulated. The meter's own voltage can leave the gate a few volts negative, enough to close the channel, so the gate is shorted to the source once more. Drain to source then reads a low resistance in both directions, tens of ohms or less, the channel itself; an enhancement MOSFET shows only its body diode there. With a 9 V battery holding the gate 9 V below the source, negative terminal on the gate, the channel closes and the diode range shows the body diode, red lead on the source. The DN2540 in TO-92 is S-G-D, flat face toward the viewer, legs down. The BSS139I is SOT-23 only (pin 1 gate, 2 source, 3 drain), needs an adapter for a breadboard, and is ESD class 0: static under 250 V can damage it.

First build: a 1 mA current source. On the +15 V lab supply: the meter on its mA range from +15 V to the drain of a DN2540, 2.2 kΩ from source to ground, gate to ground. The meter reads 0.6 to 1.5 mA depending on the part, and hardly moves as the supply is turned from about 5 V up to 15 V. The voltage across the 2.2 kΩ is the part's own ∣VGS∣|V_{GS}|, a little under its ∣VGS(off)∣|V_{GS(off)}|. At most 23 mW: nothing gets warm.

Second build: a normally-closed switch. The same DN2540 with its source on ground, a red LED and 1 kΩ from +15 V to the drain, and 100 kΩ from gate to ground. The LED lights with nothing driving the gate: about 12.7 mA, with 0.2 to 0.3 V from drain to source. A wire from the gate to the -15 V rail (VGS=−15V_{GS} = -15 V, inside the ±20 V limit) turns it off, and the drain rises toward 15 V. Removing the wire turns it back on. Without the 1 kΩ and the LED, the same part across 15 V would pass at least 150 mA and burn 2.25 W.

07

Common traps

  • A gate at 0 V, or left floating, means off.

    Only an enhancement MOSFET is off at VGS=0V_{GS} = 0, and even there a floating gate can leave it half on. A depletion part is on at VGS=0V_{GS} = 0: with 25 V across it, a DN2540 passes at least 150 mA. A floating gate has no defined voltage, and anywhere above VGS(off)V_{GS(off)} the channel conducts: an undriven depletion MOSFET is treated as on.

  • A depletion MOSFET is a JFET under another name.

    The equations match, but the gate is insulated: it draws at most 100 nA at ±20 V on a DN2540 and may go positive, where a JFET's gate junction would conduct. A positive gate opens the channel further, from 30 Ω max at VGS=0V_{GS} = 0 to 14 Ω max at 10 V on the BSS139I.

  • At VGS(off)V_{GS(off)} the part blocks.

    VGS(off)V_{GS(off)} is a test point where 10 µA still flows (DN2540, VDS=25V_{DS} = 25 V). The datasheet rates blocking at -5 V, and the BSS139I rates its off leakage at -3 V against a worst threshold of -2.1 V. A design drives the gate past it with margin.

  • The datasheet's IDSSI_{DSS} is the current a given part passes at VGS=0V_{GS} = 0.

    It is only a minimum, with no maximum: 150 mA for the DN2540 at VDS=25V_{DS} = 25 V, 30 mA for the BSS139I at 10 V. A real part passes that or more, by an amount the datasheet leaves open. A current source set by IDSSI_{DSS} alone is unpredictable; the source resistor and the part's VGS(off)V_{GS(off)} set the current.

  • "Free from thermal runaway" on the datasheet makes any operating point safe.

    That holds fully on, where RDS(on)R_{DS(on)} rises with heat and the current falls. A current source runs at low current and high VDSV_{DS}, where heating lowers the threshold and raises the current. The safe operating area and the dissipation decide, not that sentence.

  • An off MOSFET blocks current both ways.

    The body diode conducts from source to drain whatever the gate does, with up to 1.8 V across it at 120 mA on a DN2540. Blocking both polarities takes two parts in series, sources joined.

08

Check yourself

answers fold out
  1. A DN2540 with VGS(off)=−2.5V_{GS(off)} = -2.5 V and IDSS=200I_{DSS} = 200 mA must source 2 mA. What resistor from source to gate, and how hot does it run with 100 V across it?

    Answer

    RS=2.5×(1−2/200)/2 mA=1125 ΩR_S = 2.5 \times (1 - \sqrt{2/200}) / 2\ \text{mA} = 1125\ \Omega; 1.1 kΩ gives 2.04 mA. At 100 V it dissipates 0.2 W, 26 °C above the room in TO-92 (132 °C/W). On a real part the resistor gets trimmed: the square law is a first guess.

  2. A BSS139I has its gate tied to its source and a 1 kΩ load to 12 V. Which region, and what is VDSV_{DS}?

    Answer

    Fully on, in the resistor (triode) region: the load allows at most 12 mA, well under the 30 mA minimum IDSSI_{DSS}. With RDS(on)R_{DS(on)} 12.5 Ω typical and 30 Ω max at VGS=0V_{GS} = 0, IDI_D is 11.7 to 11.9 mA and VDSV_{DS} 0.15 to 0.35 V. The switch is closed with no gate drive at all.

  3. A normally-closed switch uses a DN2540 and must stay off up to 85 °C. Is a gate drive of -4 V enough?

    Answer

    Barely. The worst part has VGS(off)=−3.5V_{GS(off)} = -3.5 V at 25 °C and moves by up to -4.5 mV/°C: at 85 °C, −3.5−0.0045×60=−3.77-3.5 - 0.0045 \times 60 = -3.77 V. -4 V clears it by only 0.23 V, and VGS(off)V_{GS(off)} is defined where 10 µA still flows. -5 V or beyond, where the datasheet rates its blocking voltage, is the safe drive.