Tool 07 · Transistor Guide · Field-effect

N-channel enhancement MOSFET

A gate held a few volts above the source opens a channel that conducts from drain to source like a small resistor, and the gate itself draws no steady current.

Controlled by: Voltage from gate to source, a few volts positive
With no drive: Off: it conducts only when driven
Fully on: A resistance, $R_{DS(on)}$ : milliohms in a power part, ohms in a small one
Terminals: G gate, D drain, S source
Used for: Low-side switches from logic pins, milliamps to tens of amperes; PWM drivers for motors, LED strips and heaters; Level shifters between 3.3 V and 5 V logic

How it works

An N-MOSFET (metal-oxide-semiconductor field-effect transistor) is a P-type body with two N-type islands in it, the source and the drain. Above the gap between them sits the gate, a conducting plate on a thin layer of oxide (glass). The gate touches nothing: it is one plate of a capacitor whose other plate is the silicon below. With the gate at the source voltage, source and drain are two N regions separated by P silicon, and nothing flows. Raising the gate above the threshold voltage $V_{th}$ draws enough electrons to the surface under the oxide to turn a thin layer of it N-type: a channel now joins source to drain. The higher the gate, the more electrons and the lower the channel's resistance.

The body is a fourth terminal. A discrete part ties it to the source inside the package, and that tie leaves a PN junction from the source (P body, anode) to the drain (cathode): the body diode, drawn in the symbol of most parts. In the symbol the arrow sits on the body and points in, from the P body to the N channel; on a P-MOSFET it points out. The channel line is broken in three: enhancement, off with the gate at the source. A power MOSFET puts many small cells in parallel on one die and runs the current vertically through it, from the drain underneath up to the source on top, which is how one die carries tens of amperes. Like the NPN it is off with its control pin at 0 V, here the gate tied to the source, but a voltage controls it, not a current: once the gate is charged, the 2N7000 guarantees under 10 nA into it at 15 V.

Above the threshold the drain current follows the square law, written with the overdrive $V_{ov} = V_{GS} - V_{th}$ , the gate voltage in excess of the threshold. While $V_{DS} < V_{ov}$ the channel is a resistor that the gate sets:

I_D = k \left[ V_{ov}\, V_{DS} - \tfrac12 V_{DS}^2 \right] \qquad R_{DS} \approx \frac{1}{k\, V_{ov}} \ \text{ for small } V_{DS}

Once the drain is more than $V_{ov}$ above the source, the channel pinches off at the drain end and the current stops growing: the part becomes a current source set by the gate:

I_D = \tfrac12 k\, V_{ov}^2 \left(1 + \lambda V_{DS}\right) \qquad V_{DS} \ge V_{ov}

$k = \mu_n C_{ox} W / L$ , in A/V², grows with the mobility of electrons $\mu_n$ , the oxide capacitance per unit area $C_{ox}$ , and the width-to-length ratio of the channel. $\lambda$ , per volt, is the small rise of current with $V_{DS}$ in saturation. The curves below use $V_{th} = 2$ V, $k = 5$ mA/V² and $\lambda = 0.01$ /V. At $V_{GS} = 4$ V, $V_{ov} = 2$ V: about 10 mA in saturation, 11 mA at $V_{DS} = 10$ V, and a channel of $1 / (5\ \text{mA/V}^2 \times 2\ \text{V}) = 100\ \Omega$ for small $V_{DS}$ . A power MOSFET follows these laws only roughly, and its datasheet gives curves instead of $k$ .

Regions of operation

Region	Gate	Drain-source	What happens	Used as
Off (cutoff)	$V_{GS} < V_{th}$	up to the rating	only leakage flows	open switch
Fully on (triode, ohmic)	above $V_{th}$ , well above for a switch	$V_{DS} < V_{GS} - V_{th}$	a resistor set by the gate, $R_{DS(on)}$ on a datasheet; conducts either way	closed switch
Current source (saturation)	above $V_{th}$	$V_{DS} \ge V_{GS} - V_{th}$	$I_D$ set by $V_{GS}$ , nearly independent of $V_{DS}$	amplifier, linear regulator, electronic load
Reverse	below $V_{th}$	drain a diode drop below the source	the body diode conducts	freewheeling, level shifting

The names clash three ways. A BJT's "saturation" is its fully-on switch, but a MOSFET's "saturation" is the current-source region, the BJT's active region. Textbooks and the simulator's hover box call the fully-on region "linear", while power-MOSFET application notes say "linear mode" for the current-source region, where a part works as a regulator or an electronic load; Nexperia uses both meanings in one paragraph. The region is set by $V_{DS}$ against $V_{GS} - V_{th}$ , whatever the word.

The threshold is a test point, not the turn-on voltage

A datasheet defines $V_{GS(th)}$ as the gate voltage at which a small test current flows with the drain tied to the gate: 1 mA for the 2N7000 and BSS138, 250 µA for the IRF540N and IRLZ44N. At its threshold the part is barely on. The spread is wide, 0.8 to 3 V for the 2N7000 (2.1 V typical), and the threshold falls as the die warms, by 2 mV/°C typical on a BSS138; TI gives about 7 mV/°C as a rough figure. A switch needs the line that guarantees $R_{DS(on)}$ at a stated $V_{GS}$ , several volts higher: 4.5 V and 10 V for the 2N7000. The first design rule turns this into the choice of a part.

The body diode, and the two-way level shifter

The body diode conducts whenever the drain goes a diode drop below the source, whatever the gate does: an off N-MOSFET blocks in one direction only. Blocking both ways takes two parts back to back, source to source. The diode is also slow to stop conducting, because it stores charge, and in a bridge that charge costs energy at every switching edge.

The third simulation puts the diode to work in the level shifter of NXP's note AN10441, written for the I2C bus. A BSS138 has its gate on the 3.3 V supply, its source on the 3.3 V line and its drain on the 5 V line, each line with its own pull-up. With nothing pulling down, $V_{GS} = 0$ and each side sits at its own supply. When the 3.3 V side pulls low, $V_{GS}$ rises to 3.3 V and the channel pulls the 5 V side down as well. When the 5 V side pulls low, the body diode drags the 3.3 V side down until $V_{GS}$ passes the threshold, and then the channel takes over. Either side can drive, each side only sees its own voltage, and the note limits the circuit to 400 kbit/s. The margin depends on the lower supply (question 3).

Low side and high side

On the low side, source on ground and the load between the supply and the drain, the gate voltage is the logic voltage itself: a 5 V pin gives $V_{GS} = 5$ V whatever the load's supply. On the high side, drain on the supply and the load under the source, the source rises with the load. Keeping the part on then needs a gate above the supply, from a bootstrap capacitor or a charge pump, usually inside a driver IC. A bootstrap alone cannot hold the switch on at 100 % duty. A P-MOSFET needs no rail above the supply, but its gate must swing from the supply to several volts below it, so on a rail above the logic supply a pin drives it through a small transistor and a pull-up (its own page). It also has a higher resistance for the same die size, because holes move more slowly than electrons. In one catalogue pair, Vishay's IRF540 is 0.077 Ω at most and its P-channel counterpart, the IRF9540, 0.20 Ω, both with 10 V of gate drive ( $V_{GS} = -10$ V for the P part), though their dies may differ.

Small-signal model, subthreshold, body effect

Biased in saturation, the part amplifies as a current source controlled by $V_{GS}$ . Its small-signal numbers follow from the square law:

g_m = k\, V_{ov} = \frac{2 I_D}{V_{ov}} = \sqrt{2 k I_D} \qquad r_o \approx \frac{1}{\lambda I_D}

A BJT at the same current has $g_m = I_C / V_T$ , with $V_T = 25.85$ mV at 300 K the thermal voltage, not the threshold. The MOSFET's is smaller by the factor $V_{ov} / (2 V_T)$ : 3.9 times at $V_{ov} = 0.2$ V, 19 times at 1 V. With the curves' $k = 5$ mA/V² at 10 mA, $V_{ov} = 2$ V and $g_m = 10$ mS, against 387 mS for a BJT.

A common-source stage, input on the gate and output on the drain with its resistor $R_D$ , has the voltage gain:

A_v = -g_m \left(R_D \parallel r_o\right)

On the curves at $V_{GS} = 3$ V, $I_D \approx 2.5$ mA, $g_m = 5$ mS and $r_o = 1 / (0.01 \times 2.5\ \text{mA}) = 40\ \text{k}\Omega$ . With $R_D = 1$ kΩ the gain is $-5\ \text{mS} \times 976\ \Omega = -4.9$ . A BJT at the same current has $g_m = 97$ mS and a gain near $-97$ , about 20 times more.

Below the threshold the current does not stop at once. It falls exponentially, tenfold for every $n V_T \ln 10 = 59.5\, n$ mV of gate voltage at 300 K, where $n \ge 1$ depends on the device. Nexperia measured a power part whose current grows 100 000 times over less than 1 V of gate, which is why a threshold means nothing without its test current.

When the source sits above the body, $V_{th}$ rises: the body effect. A discrete part ties body to source, so its threshold is the datasheet's, and the price of that tie is the body diode.

Relatives

Small-signal parts, the 2N7000 in TO-92 and the BSS138 in SOT-23, carry about 200 mA with ohms of $R_{DS(on)}$ and tens of picofarads on the gate: for LEDs, relays and logic. Power parts such as the IRLZ44N and IRF540N carry amperes through milliohms, and need tens of nanocoulombs of gate charge.

Logic-level parts guarantee $R_{DS(on)}$ at 4.5 V or 5 V, some at 2.5 V. Their gate rating is often lower, ±16 V for the IRLZ44N against ±20 V for the IRF540N. A lower threshold also leaves less margin to stay off when hot, so some designs choose a standard part on purpose.

The depletion-mode MOSFET is the same structure with a channel built in: on at $V_{GS} = 0$ , off only with a negative gate. GaN and SiC transistors are N-channel enhancement switches in other materials, each with gate limits of its own. Both have their pages.

The curves

interactive

Output curves of the square law with $V_{th} = 2$ V, $k = 5$ mA/V² and $\lambda = 0.01$ /V. Left of the dashed parabola, $V_{DS} = V_{GS} - V_{th}$ , the part is fully on, a resistor set by the gate; right of it the curves are nearly flat, a current source. The red line is the load line of $R_D$ on $V_{DD}$ : a switch jumps from its bottom right end, off, to its top left end, fully on.

Gate-source voltage

V_{GS}

4.00 V Supply

V_{DD}

10.0 V Drain resistor

R_D

1.00 kΩ

triode (ohmic): V_DS = 1.26 V, I_D = 8.74 mA, channel about 144 Ω

Left of the dashed edge the channel acts as a resistor whose value the gate sets. A FET used as a switch sits here, fully on, and its datasheet gives that resistance as $R_{DS(on)}$ .

Circuits to try

Falstad's simulator, one at a time

Each circuit runs in Paul Falstad's CircuitJS, loaded only on request. The sliders are in the panel on the right of the simulator, switches toggle with a click, and hovering a part shows its voltages, currents and state at the bottom right.

Schematic: MOSFET switching a motor coil — Simulation
MOSFET switching a motor coil

Schematic: Logic-level against standard MOSFET — Simulation
Logic-level against standard MOSFET

Schematic: Two-way level shifter, 3.3 V to 5 V — Simulation
Two-way level shifter, 3.3 V to 5 V

Design rules

Choose by $R_{DS(on)}$ at the gate voltage the driver really gives

"Logic-level" means the datasheet guarantees $R_{DS(on)}$ at a logic gate voltage, not that $V_{GS(th)}$ is low. The IRLZ44N guarantees at most 22, 25 and 35 mΩ at 10, 5 and 4 V. The IRF540N guarantees 44 mΩ at 10 V only, and its threshold may be as high as 4.0 V, where it passes just 250 µA. From a 5 V pin it is a gamble: one part switches fully, the next sits in its current-source region and overheats.

V_{DS} = I_D\, R_{DS(on)} \quad \text{with } R_{DS(on)} \text{ read at the real } V_{GS}

The second simulation shows the gamble. Its standard part, modelled with $V_{th} = 3.5$ V and $k = 1.5$ A/V², passes at most $\tfrac12 \times 1.5 \times (5 - 3.5)^2 = 1.69$ A at 5 V, short of the 2 A its 6 Ω load asks for. It stays in saturation with 1.9 V across it and burns 3.2 W, while the logic-level part ( $V_{th} = 1.5$ V, $k = 3$ A/V²) drops 0.19 V and loses 0.38 W. At 3.3 V the standard part does not conduct at all. A 3.3 V pin needs a part rated at 2.5 V, such as the AO3400A, 48 mΩ at most at 2.5 V.

Conduction loss: $I^2 R_{DS(on)}$ , with the hot resistance

P = I_{D,rms}^2\, R_{DS(on)}(T_J) \qquad T_J = T_A + P\, R_{\theta JA}

$R_{DS(on)}$ rises with temperature, 1.5 to 2.2 times from 25 °C to 125 °C for silicon parts: 1.58 times typical on a 2N7000, about 1.65 on an IRLZ44N (read from its graph). Loss and temperature feed each other, so the sum is repeated until it settles.

Example: an IRLZ44N switches 5 A from a 5 V pin, in free air at 25 °C, where $R_{\theta JA} = 62$ °C/W. Cold, $P = 5^2 \times 0.025 = 0.63$ W, a rise of 39 °C. The warmer die has a higher resistance, and the loop settles near $T_J = 75$ °C and 0.8 W, well under the 175 °C limit. At 10 A the same part loses 2.5 W cold, already 155 °C of rise, and the loop never settles: thermal runaway. On a 5 °C/W heatsink, with 1.4 °C/W from junction to case and 0.5 °C/W from case to sink, 10 A gives 2.75 W and a junction near 44 °C.

The current printed on the first page of a datasheet assumes the mounting base held at 25 °C, a heatsink no breadboard has; the thermal resistance decides what a part really carries. With PWM, $I_{D,rms}$ is the on-current times the square root of the duty cycle.

The gate is a capacitor: charge it fast, never leave it floating

The driver has to move the total gate charge $Q_G$ within the switching time $t_{sw}$ . During the two transitions, $t_r$ and $t_f$ , voltage and current overlap in the transistor, at every period of the switching frequency $f$ :

I_G \approx \frac{Q_G}{t_{sw}} \qquad P_{sw} \approx \tfrac12 V_{DD}\, I_D \left(t_r + t_f\right) f

The IRLZ44N needs at most 48 nC to reach 5 V on its gate. A pin that sources about 20 mA takes up to $48\ \text{nC} / 20\ \text{mA} = 2.4\ \mu\text{s}$ per edge; a gate driver giving 0.48 A does it in 100 ns. With the pin as driver, switching 5 A from 12 V costs at most $\tfrac12 \times 12 \times 5 \times 4.8\ \mu\text{s} = 0.14$ mJ per period, counting the whole charging time as transition. That is 0.14 W at 1 kHz, but 2.9 W at 20 kHz, nine times the 0.31 W of conduction at half duty. With the driver it falls to 0.12 W at 20 kHz. A pin is enough for slow switching; fast PWM wants a gate driver.

On the way up, $V_{GS}$ stops rising for a while: the Miller plateau, near $V_{th} + I_D / g_{fs}$ with $g_{fs}$ the forward transconductance. There the drive current goes into the gate-drain capacitance while the drain voltage swings, and the charge spent is $Q_{GD}$ on the datasheet's gate-charge curve. The plateau moves with the load current, and it sits above $V_{GS(th)}$ , which was measured at a fraction of a milliamp.

Two resistors complete the drive. A series resistor (100 Ω in the first simulation) limits the current drawn from the pin and damps the ringing of the gate capacitance with the inductance of the wiring. A resistor from gate to source (100 kΩ there) holds the gate at 0 V when the driver is unplugged or a microcontroller pin is still an input after reset. A floating gate keeps whatever charge it last received and can leave the part half on, in its current-source region, heating.

Sizing the two gate resistors

TI gives the series resistance that critically damps the gate loop, less the driver and the internal gate resistances already in it:

R_{G,opt} = 2 \sqrt{\frac{L_S}{C_{iss}}} - \left(R_{DRV} + R_{G,int}\right)

A Vishay IRF540, a different part from the IRF540N, with 7.5 nH inside its package, about 10 nH of wiring and 1700 pF of input capacitance needs $2 \sqrt{17.5\ \text{nH} / 1700\ \text{pF}} = 6.4\ \Omega$ in total.

A fast edge on the drain couples into the gate through the gate-drain capacitance. The pull-down holds the gate off against it only when it is small enough, with the hot threshold:

R_{GS} < \frac{V_{th}}{C_{GD}\, dv/dt}

For a hot threshold of 2 V and the IRF540's 120 pF of $C_{rss}$ at 25 V, this asks for under 16.7 kΩ at 1 V/µs and 1.7 kΩ at 10 V/µs; $C_{GD}$ grows at low $V_{DS}$ , so the real limit is lower. A 100 kΩ pull-down only defines the idle level; while switching, the driver itself has to hold the gate down.

An inductive load needs a flyback diode, not the avalanche rating

A coil keeps its current flowing when the switch opens. With a diode across it, cathode to the supply, the drain stops one diode drop above the supply. Without one, the drain climbs until the MOSFET breaks down (avalanche), and the energy of the coil goes into the die at every turn-off:

E = \tfrac12 L I^2 \qquad P = E\, f

In the first simulation 10 mH at 1.2 A store $\tfrac12 \times 10\ \text{mH} \times (1.2\ \text{A})^2 = 7.2$ mJ: at 100 Hz, about 0.7 W dumped into the transistor at 62 V. A datasheet rates one such pulse as $E_{AS}$ , the energy that heats the die from 25 °C to its maximum: 210 mJ for the IRLZ44N, tested with 470 µH at 25 A on 25 V. Nexperia counts avalanche events as outside the safe operating area: the rating covers accidents, and a design uses the diode.

Energy with the supply still connected

While the drain sits at its breakdown voltage the supply keeps pushing current through the coil, so the die takes more than the stored energy:

E = \tfrac12 L I^2\, \frac{V_{BR}}{V_{BR} - V_{DD}}

With the IRLZ44N's test conditions and a breakdown near 1.3 times its 55 V rating, Nexperia's rule of thumb, this gives 226 mJ, close to the 210 mJ rated, where $\tfrac12 L I^2$ alone gives 147 mJ.

Linear mode: below the zero-temperature-coefficient point, heat raises the current

As a current source, in a linear regulator, an electronic load or a slow hot-swap ramp, the part holds volts and amperes at once. Two effects of temperature then compete: the threshold falls, which raises the current, and the channel resistance rises, which lowers it. Below the zero-temperature-coefficient point (ZTC), where the transfer curves at 25 °C and 175 °C cross, the first one wins: a hotter spot draws more current and heats further. The IRLZ44N's curves cross near 20 A, at about 3.3 V on the gate (read from its graph).

The safe operating area (SOA) plots the power the die can shed for each pulse length, from the thermal impedance $Z_{th}$ between junction and mounting base:

P = I_D\, V_{DS} = \frac{T_{J(max)} - T_{mb}}{Z_{th(j\text{-}mb)}}

Its lines assume the mounting base held at $T_{mb} = 25$ °C and shrink when it is hotter. Example: an IRLZ44N as a 1 A electronic load on 12 V dissipates 12 W, and on the heatsink of the conduction example its junction reaches $25 + 12 \times 6.9 = 108$ °C, inside the steady-state budget. But 1 A is far below the ZTC. Inside the die the current crowds into hot spots (the Spirito effect), and Nexperia shows a part whose allowed current at 20 V falls from a theoretical 60 A to about 15 A. A linear design picks a part with a DC line on its SOA or a linear-mode rating, and favours older planar parts or a larger die over dense trench parts.

Parallel parts. Fully on, they share: the hotter one has the higher $R_{DS(on)}$ and takes less. The sharing is never equal, and each gate gets its own small resistor, or the part with the lowest threshold holds the others on its Miller plateau and switches on first and off last. In linear mode parallel parts do not share at all, and a resistor in each source supplies the feedback.

Real parts and their datasheets

Pinouts as seen from the front, legs down. Every value comes with the condition it is measured at: a number from a datasheet means nothing without it.

flat face toward the viewer; the reverse of a BS170

2N7000

N-MOSFET, small signal

onsemi (Fairchild), TO-92. Datasheet (PDF), onsemi.com

Line	Value	Measured at
$V_{DSS}$	60 V max	absolute maximum
$I_D$	200 mA, 500 mA	continuous, pulsed
$V_{GS(th)}$	0.8 to 3 V (2.1 typ)	$V_{DS} = V_{GS}$ , $I_D = 1$ mA
$R_{DS(on)}$	5 Ω max (1.2 typ)	$V_{GS} = 10$ V, $I_D = 500$ mA (9 Ω max at 125 °C)
$R_{DS(on)}$	5.3 Ω max (1.8 typ)	$V_{GS} = 4.5$ V, $I_D = 75$ mA
$g_{FS}$	100 mS min (320 typ)	$V_{DS} = 10$ V, $I_D = 200$ mA
$C_{iss}$ , $C_{oss}$ , $C_{rss}$	50, 25, 5 pF max	$V_{DS} = 25$ V, $V_{GS} = 0$ , $f = 1$ MHz
$t_{on}$ , $t_{off}$	10 ns max	$V_{DD} = 15$ V, $I_D = 500$ mA, $V_{GS} = 10$ V, $R_L = R_{GEN} = 25$ Ω
$V_{GSS}$	±20 V max	continuous (±40 V non-repetitive)
$P_D$ , $R_{\theta JA}$	400 mW, 312.5 °C/W	derate 3.2 mW/°C

What to read first. $R_{DS(on)}$ at the gate voltage of the job: it is guaranteed only at 10 V and 4.5 V, and $V_{GS(th)}$ reaches 3 V, so a 3.3 V logic pin does not turn every part fully on. The threshold row is measured at only 1 mA.

pins 1, 2, 3; surface mount only, on an adapter for a breadboard

BSS138

N-MOSFET, logic level

onsemi, SOT-23. Datasheet (PDF), onsemi.com

Line	Value	Measured at
$V_{DSS}$	50 V max	absolute maximum
$I_D$	0.22 A, 0.88 A	continuous, pulsed
$V_{GS(th)}$	0.8 to 1.5 V (1.3 typ)	$V_{DS} = V_{GS}$ , $I_D = 1$ mA
$R_{DS(on)}$	3.5 Ω max (0.7 typ)	$V_{GS} = 10$ V, $I_D = 0.22$ A
$R_{DS(on)}$	6.0 Ω max (1.0 typ)	$V_{GS} = 4.5$ V, $I_D = 0.22$ A
$g_{FS}$	0.12 S min (0.5 typ)	$V_{DS} = 10$ V, $I_D = 0.22$ A
$C_{iss}$ , $C_{oss}$ , $C_{rss}$	27, 13, 6 pF typ	$V_{DS} = 25$ V, $V_{GS} = 0$ , $f = 1$ MHz
$Q_g$	2.4 nC max (1.7 typ)	$V_{DS} = 25$ V, $I_D = 0.22$ A, $V_{GS} = 10$ V
$P_D$ , $R_{\theta JA}$	0.36 W, 350 °C/W	minimum pad
$V_{GSS}$	±20 V max	absolute maximum

What to read first. "Logic level" here means $R_{DS(on)}$ is guaranteed at 4.5 V; at 2.5 to 3.3 V there are only typical curves (Fig. 2). The threshold, 1.5 V at most, is measured at 1 mA, far below a working current.

tab: D

printed face toward the viewer, tab behind; the tab is the drain. The IRFZ44N, one letter away, has the same pinout but is not logic level

IRLZ44NPbF

N-MOSFET, power, logic level

Infineon (International Rectifier), TO-220AB. Datasheet, infineon.com

Line	Value	Measured at
$V_{(BR)DSS}$	55 V min	$V_{GS} = 0$ , $I_D = 250$ µA
$V_{GS}$	±16 V max	absolute maximum (±20 V on the IRF540N)
$I_D$	47 A max	$V_{GS} = 10$ V, case held at $T_C = 25$ °C (33 A at $T_C = 100$ °C)
$R_{DS(on)}$	22 mΩ max	$V_{GS} = 10$ V, $I_D = 25$ A
$R_{DS(on)}$	25 mΩ max	$V_{GS} = 5.0$ V, $I_D = 25$ A
$R_{DS(on)}$	35 mΩ max	$V_{GS} = 4.0$ V, $I_D = 21$ A
$V_{GS(th)}$	1.0 to 2.0 V	$V_{DS} = V_{GS}$ , $I_D = 250$ µA
$Q_g$	48 nC max	$V_{GS} = 5.0$ V, $V_{DS} = 44$ V, $I_D = 25$ A ( $Q_{gd}$ 25 nC max)
$E_{AS}$	210 mJ max	single pulse, $I_{AS} = 25$ A, $L = 470$ µH, $V_{DD} = 25$ V, $R_G = 25$ Ω
$R_{\theta JC}$ , $R_{\theta JA}$	1.4, 62 °C/W max	junction to case, junction to free air; $P_D = 110$ W only at $T_C = 25$ °C

What to read first. The three $R_{DS(on)}$ lines first: 25 mΩ at 5.0 V and 35 mΩ at 4.0 V are guaranteed, which is what "logic level" means; below 4 V only the typical curves of Fig. 1 remain, so a 3.3 V pin guarantees nothing. Then $V_{GS}$ : ±16 V, not ±20 V, so +15 V is the most a gate driver may apply.

tab: D

printed face toward the viewer, tab behind; the tab is the drain, live, so it needs an insulating pad on a shared heatsink

IRF540NPbF

N-MOSFET, power, standard gate

Infineon (International Rectifier), TO-220. Datasheet, infineon.com

Line	Value	Measured at
$V_{(BR)DSS}$	100 V min	$V_{GS} = 0$ , $I_D = 250$ µA
$V_{GS}$	±20 V max	absolute maximum
$I_D$	33 A max	$V_{GS} = 10$ V, case held at $T_C = 25$ °C (23 A at $T_C = 100$ °C)
$R_{DS(on)}$	44 mΩ max	$V_{GS} = 10$ V, $I_D = 16$ A; the only gate voltage given, no line at 5 V or 4.5 V
$V_{GS(th)}$	2.0 to 4.0 V	$V_{DS} = V_{GS}$ , $I_D = 250$ µA
$Q_g$	71 nC max	$V_{GS} = 10$ V, $V_{DS} = 80$ V, $I_D = 16$ A ( $Q_{gs}$ 14, $Q_{gd}$ 21 nC max)
$C_{iss}$ , $C_{oss}$ , $C_{rss}$	1960, 250, 40 pF typ	$V_{GS} = 0$ , $V_{DS} = 25$ V, $f = 1$ MHz
$E_{AS}$	185 mJ max	single pulse, $I_{AS} = 16$ A, $L = 1.5$ mH, calculated to $T_J = 175$ °C; the 700 mJ beside it is a typical value at destruction, not a rating
$t_{rr}$ , $Q_{rr}$	170 ns, 760 nC max (115, 505 typ)	body diode, $I_F = 16$ A, $di/dt = 100$ A/µs
$R_{\theta JC}$ , $R_{\theta JA}$	1.15, 62 °C/W max	junction to case, junction to free air; $P_D = 130$ W only at $T_C = 25$ °C

What to read first. $R_{DS(on)}$ is given at $V_{GS} = 10$ V only, and a part in spec can have $V_{GS(th)} = 4.0$ V, where it passes just 250 µA: from a 5 V or 3.3 V pin nothing is guaranteed. The 33 A also needs a case held at 25 °C; in free air, $(175 - 25) / 62 \approx 2.4$ W is the limit.

flat face toward the viewer; the reverse of a 2N7000

BS170

N-MOSFET, small signal

onsemi, TO-92. Datasheet (PDF), onsemi.com

Line	Value	Measured at
$V_{DS}$	60 V max	absolute maximum
$I_D$	0.5 A max	absolute maximum
$V_{GS(th)}$	0.8 to 3.0 V (2.0 typ)	$V_{DS} = V_{GS}$ , $I_D = 1.0$ mA
$r_{DS(on)}$	5.0 Ω max (1.8 typ)	$V_{GS} = 10$ V, $I_D = 200$ mA, the only gate voltage given
$g_{fs}$	200 mS typ	$V_{DS} = 10$ V, $I_D = 250$ mA
$C_{iss}$	60 pF max	$V_{DS} = 10$ V, $V_{GS} = 0$ , $f = 1$ MHz
$t_{on}$ , $t_{off}$	10 ns max (4.0 typ)	$I_D = 0.2$ A, test circuit of Fig. 1
$I_{D(off)}$	0.5 µA max	$V_{DS} = 25$ V, $V_{GS} = 0$
$V_{GS}$	±20 V max	continuous (±40 V non-repetitive, 50 µs max)
$P_D$	350 mW	$T_A = 25$ °C; no thermal resistance given

What to read first. The pinout first: placed in a 2N7000's holes, drain and source swap and the body diode conducts. Then $r_{DS(on)}$ , given only at $V_{GS} = 10$ V.

On the bench

Handling. The oxide under the gate is thin and these parts are static-sensitive: the 2N7000 datasheet guarantees only 100 V of human-body-model discharge, and the BSS138 sits in class 0A, a very sensitive class. The part stays in its conductive foam until it goes into the board, after a touch on a grounded point, and the gate-source resistor goes in before the rest of the circuit.

Meter check. First a short from gate to source empties the gate. On the diode range, red lead on the source and black on the drain: one diode drop, 0.4 to 0.7 V, the body diode. Leads swapped: nothing. Gate to either pin: nothing, either way. Red on the gate and black on the source then charges the gate from the meter: if the meter's test voltage is above the threshold, drain to source reads near zero both ways until the gate is shorted to the source again. Pins: the 2N7000 is S-G-D with the flat face toward the viewer, legs down; the SOT-23 BSS138 and 2N7002 have pin 1 gate, pin 2 source, pin 3 drain, and need an adapter on a breadboard.

First build. A 2N7000 low-side switch on 5 V: an LED and 330 Ω from 5 V to the drain, the source to ground, 100 Ω from an input wire to the gate, 100 kΩ from gate to source. Input on 5 V: the LED takes about $(5 - 1.8) / 330\ \Omega = 9.7$ mA, and the meter reads at most $9.7\ \text{mA} \times 5.3\ \Omega = 51$ mV from drain to source, nearer 17 mV with the typical 1.8 Ω. Input on 0 V: the LED is dark. A potentiometer on the input finds this part's own threshold, at 1 mA as on the datasheet: 0.33 V across the 330 Ω. It lies somewhere in the datasheet's 0.8 to 3 V, and the LED already glows faintly a little below it. With the input wire and the 100 kΩ both removed, the LED may stay lit, stay dark, or follow a hand brought near the gate.

Common traps

The gate draws no current, so any drive will do, or none.

The gate is a capacitor: no steady current, but amperes for nanoseconds at every edge, 0.48 A to move an IRLZ44N's 48 nC in 100 ns. Left floating it keeps whatever charge it picks up and can hold the part half on. A resistor from gate to source keeps it off.
$V_{GS(th)}$ is the voltage that turns the part on, and logic-level means a low threshold.

At $V_{GS(th)}$ the part passes a test current of 250 µA or 1 mA. Logic-level means $R_{DS(on)}$ is guaranteed at 4.5 V or 5 V, sometimes 2.5 V. An IRF540N may need 4.0 V just to pass 250 µA and is specified fully on only at 10 V.
A MOSFET in saturation is fully on, like a BJT in saturation.

MOSFET saturation is the current-source region, $V_{DS} \ge V_{GS} - V_{th}$ , where the part holds volts at full current and heats. Fully on is the triode (ohmic) region, which the simulator labels "linear".
An off MOSFET blocks current both ways.

The body diode conducts from source to drain whenever the drain goes a diode drop below the source. Blocking both ways takes two parts back to back, source to source.
A MOSFET cannot run away thermally.

Fully on, the rising $R_{DS(on)}$ makes parallel parts and the cells of one die share current. But at a fixed current the same rise raises the loss, and on too small a heatsink the loop never settles: 10 A in an IRLZ44N in free air, in the conduction rule. Holding volts and amperes below its zero-temperature-coefficient point, its current rises with temperature and gathers in hot spots.
Small MOSFETs in the same package share one pinout.

The TO-92 2N7000 reads S-G-D with the flat face toward the viewer and the legs down; the BS170 in the same package reads D-G-S. The SOT-23 2N7002, in the same datasheet as the 2N7000, is G-S-D. With drain and source swapped in a low-side switch, the body diode conducts from the load to ground and the load stays on whatever the gate does.

Check yourself

answers fold out

An IRF540N and an IRLZ44N are in the drawer, for a 3 A load switched on the low side by a 5 V pin. Which one, and how warm does it run in free air?

Answer

The IRLZ44N: it guarantees 25 mΩ at 5 V, while the IRF540N's 44 mΩ holds only at 10 V and its threshold may reach 4.0 V. $P = 3^2 \times 0.025 = 0.225$ W, a rise of $0.225 \times 62 = 14$ °C; with the resistance growing as it warms, the junction settles near 40 °C in a 25 °C room.
On the curves above ( $V_{th} = 2$ V, $k = 5$ mA/V², $V_{DD} = 10$ V, $R_D = 1$ kΩ), the gate goes to 3 V, then to 4 V. Which region each time, and what sets the current?

Answer

At 3 V, $V_{ov} = 1$ V and the channel passes about $\tfrac12 \times 5 \times 1^2 = 2.5$ mA, 2.7 mA with $\lambda$ , leaving 7.3 V across the part: more than $V_{ov}$ , so saturation, and the gate sets the current. At 4 V the gate would allow 10 mA in saturation, but 10 mA through 1 kΩ would leave nothing across the part: the point slides left of the edge to 1.26 V and 8.7 mA, below $V_{ov} = 2$ V, so triode, a channel of about 144 Ω, and the resistor sets the current.
Can the BSS138 level shifter of the third simulation serve a 1.8 V bus against a 5 V one?

Answer

Not with a guarantee. With the 1.8 V side driven to a logic low of 0.4 V, $V_{GS} = 1.8 - 0.4 = 1.4$ V, under the BSS138's maximum $V_{GS(th)}$ of 1.5 V, and even 1.5 V only promises 1 mA. At 3.3 V the margin is $3.3 - 0.4 - 1.5 = 1.4$ V, at 2.5 V only 0.6 V. A 2N7000, with its threshold up to 3 V, is not guaranteed even at 3.3 V: $3.3 - 0.4 = 2.9$ V.

How it works

Regions of operation

The threshold is a test point, not the turn-on voltage

The body diode, and the two-way level shifter

Low side and high side

Relatives

The curves

Circuits to try

MOSFET switching a motor coil

Logic-level against standard MOSFET

Two-way level shifter, 3.3 V to 5 V

Design rules

Choose by RDS(on)R_{DS(on)}RDS(on)​ at the gate voltage the driver really gives

Conduction loss: I2RDS(on)I^2 R_{DS(on)}I2RDS(on)​, with the hot resistance

The gate is a capacitor: charge it fast, never leave it floating

An inductive load needs a flyback diode, not the avalanche rating

Linear mode: below the zero-temperature-coefficient point, heat raises the current

Real parts and their datasheets

On the bench

Common traps

Check yourself

Choose by $R_{DS(on)}$ at the gate voltage the driver really gives

Conduction loss: $I^2 R_{DS(on)}$ , with the hot resistance